Bautista, MG, Dutkiewicz, E & Heimlich, M 2015, 'Subthreshold energy harvesters circuits for biomedical implants applications', EAI Endorsed Transactions on Energy Web, vol. 16, no. 9, pp. 1-5.View/Download from: UTS OPUS or Publisher's site
This paper reviews the state-of-art of the subthreshold level design energy harvesters for powering biomedical implants. Power consumption and lifespan are crucial requirements for the electronic circuitry of implantable systems. In order to meet these challenging requirements, a design for an energy harvester that operates in a subthreshold level offers a promising solution.
Bautista, MG, Hora, J & Dutkiewicz, E 2018, 'Design Methodology of a Miniaturized Millimetre Wave Integrated Passive Resonator Using (Bi)-CMOS Technology', ISCIT 2018 - 18th International Symposium on Communication and Information Technology, International Symposium on Communications and Information Technologies, IEEE, Bangkok, Thailand, pp. 275-277.View/Download from: UTS OPUS or Publisher's site
© 2018 IEEE. In this paper, a design methodology of a miniaturized passive resonator implemented in SiGe technology is presented. The planar structure is implemented using the topmost metal layer of the process technology to minimize the conductor loss and achieved a compact size. The physical dimension is carefully tuned to optimize the coupling capacitance between the horizontal and vertical space between each metal strip. The principle of a spiral meander line structure has been studied and applied in the new miniaturization technique develop in this paper.
Bautista, MG, Zhang, XP, Zhu, X & Dutkiewicz, E 2018, 'Design of On-Chip Edge-Coupled Resonator and Its Application for Bandpass Filter in CMOS Technology', ISCIT 2018 - 18th International Symposium on Communication and Information Technology, pp. 137-140.View/Download from: Publisher's site
© 2018 IEEE. In this work, the design of a compact on-chip edge-coupled resonator is presented. To understand the insight of the presented resonator, a simplified LC-equivalent circuit model is provided, and electromagnetic simulation is utilized for performance optimization. To demonstrate the potential of the presented resonator, a bandpass filter design example is also given. By taking advantage of using metal-insulator-metal capacitors, a compact filter can be designed. For proving of concept, both the presented resonator and filter are implemented and fabricated using standard CMOS technology. A good agreement between simulation and measurement has been achieved. The measured results show that the filter has a resonance at 35.4 GHz with an insertion loss of 1.7 dB and greater than-10 dB of return loss. The miniaturized chip area of both the resonator and the BPF, excluding the pads, is only 0.039 mm 2 (0.15 × 0.26 mm 2 ).
Li, M, Cai, YX, Bautista, MG, Yang, Y & Zhu, X 2018, 'Broadband on-chip bandpass filter using ring resonator with capacitive loading', 2018 Australian Microwave Symposium, AMS 2018 - Conference Proceedings, Australian Microwave Symposium, Brisbane, QLD, Australia, pp. 55-56.View/Download from: Publisher's site
© 2018 IEEE. Design of a broadband on-chip bandpass filter (BPF) using grounded ring resonator with capacitive loading technique is presented in this paper. To prove the concept, a standard 0.13-μm (Bi)-CMOS technology is selected for implementation. To understand how to effectively optimize the designed BPF, parametric studies against some critical parameters are given by means of EM simulation. Finally, the implemented filter is fabricated. The measured results show that the BPF has a center frequency at 33 GHz with a bandwidth of 42.4%. The minimum insertion loss is 2.6 dB, while the stopband rejection is maintained to be better than 20 dB beyond 58 GHz. The chip, excluding the pads, is very compact at only 0.03 mm2 (0.11 × 0.28 mm2).
Bautista, MG, Dutkiewicz, E & Yang, Y 2017, 'Design of a compact self-coupled resonator and dual-band bandpass filter in 0.13-μm CMOS technology for millimetre-wave application', Progress in Electromagnetics Research Symposium, Progress in Electromagnetics Research Symposium - Fall, IEEE, Singapore, Singapore, pp. 2653-2658.View/Download from: UTS OPUS or Publisher's site
© 2018 Electromagnetics Academy. All rights reserved. Design of a miniaturized resonator and its application for dual-band bandpass filter design for millimeter-wave application is presented in this paper. Both the resonator and filter are implemented in a standard 0.13-μm (Bi)-CMOS technology. The performance is extensively verified using an EM simulator from NI-AWR. Using the presented resonator structure, two transmission zeros can be generated and effectively controlled. By feeding the resonator using a capacitive coupling technique, a dual-band bandpass filter that operated at 40 GHz with insertion loss of −0.7 dB and at 71 GHz with insertion loss of −1.5 dB, respectively. The proposed design achieves a reduced layout size of 302 μm × 131 μm.
Bautista, MG, Yang, Y & Dutkiewicz, E 2017, 'Compact on-chip 60 GHz resonator with ring defected ground structure for millimetre-wave applications', HNICEM 2017 - 9th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management, International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management, IEEE, Manila, Philippines, pp. 1-4.View/Download from: UTS OPUS or Publisher's site
© 2017 IEEE. This paper presents a design of a miniaturized resonator for millimeter-wave applications. The resonator is implemented in a standard 0.13μm (Bi)CMOS technology. Its performance is verified using an EM simulator from NI-AWR. The designed resonator is based on a unique structure, a combination of spiral loop and meander line structure. The ground plane is characteristically altered with a ring defected ground structure (DGS) to enhance the overall performance. The resonator design exhibits tuning flexibility at its resonance frequency within the mm-wave spectrum that is proportional to its design dimension. By using capacitive feeding, the designed resonator generates one transmission zero at 60 GHz with insertion loss of -2.7 dB and -29.4 dB return loss respectively. The chip size of the resonator excluding the pads is only 116 μm × 236 μm (0.027mm2).
Bautista, MG, Zhu, JB, Zhu, F, Yang, Y & Dutkiewicz, E 2017, 'Design of on-chip quadrature hybrid (3dB) branch-line couplers in 0.13-μm SiGe technology for millimetre-wave applications', Proceedings of the 2017 17th International Symposium on Communications and Information Technologies, ISCIT 2017, International Symposium on Communications and Information Technologies, IEEE, Cairns, QLD, Australia, pp. 1-5.View/Download from: UTS OPUS or Publisher's site
© 2017 IEEE. In this paper, design of miniaturized on-chip quadrature hybrid branch-line coupler is investigated. The motivation of this work is to minimize the footprint of the designed coupler while maintaining high performance of the circuit in the mm-wave band spectrum. Three examples are implemented in a standard (Bi)-CMOS process for millimetre wave applications. Excluding the pads, the chip size of the conventional design is 0.35 mm2, and the proposed two other designs structures are 0.26 mm2and 0.21 mm2, respectively, which indicates an area reduction by 13% and 30% respectively.
Gay, M, Zhu, F, Nguyen, D & Dutkiewicz 2017, 'Double-Balanced Gilbert Mixer with Current Bleeding for RF Front-End Using 0.13µm SiGe BiCMOS Technology', Proc. of the IEEE 85th Vehicular Technology Conference 2017, IEEE Vehicular Technology Conference, IEEE, Sydney, Australia, pp. 1-5.View/Download from: UTS OPUS
This paper presents the design of a differential
double-balanced Gilbert mixer in 0.13 um SiGe BiCMOS
technology. A current-bleeding injection technique is adopted
to increase the bias current at the driver stage without causing
overvoltage headroom at the differential pair stage. This
mechanism improves the performance in terms of conversion
gain, linearity and noise figure. The proposed mixer achieves
10.7 dB conversion gain, 15 dB noise figure, -1.67 dBm 1-dB
compression point, and 5 dBm IIP3. The designed double
balanced Gilbert mixer with current bleeding is part of an
integrated RF front-end for full duplex radio applications in
the 2.4 GHz band and occupies an area of 0.1002 × 0.0748 mm2
excluding the pads.
Sun, Y, Bautista, MG, Zhu, F & Dutkiewicz, E 2017, 'Design of an Elliptic Filter Using Multiple-Loop Feedback Structure in CMOS Technology for Analogue Signal Processing', IEEE Vehicular Technology Conference, IEEE Vehicular Technology Conference, IEEE, Sydney, NSW, Australia, pp. 1-5.View/Download from: UTS OPUS or Publisher's site
© 2017 IEEE. Design of high-performance continuous- time filter (CTF) for analogue signal processing is presented in this paper. To demonstrate of using a novel voltage-mode multiple-loop feedback (MLF) approach for CTF design, a 5th-order elliptic lowpass filter (LPF) is implemented in a standard 0.18-μm CMOS technology. The LPF is based on an inverse-follow-the-leader feedback structure with an input distribution network to generate the required transmission zeros. The LPF consumes 35 mA from a single 1.8 V power supply and it has a cut-off frequency of 30 MHz with less than 0.7 dB passband ripple and more than 60 dB stopband attenuation. In addition, a 65 dB dynamic range is achieved.
Sun, Y, Zhu, X & Bautista, MG 2017, 'Design of fifth-order LF 0.05° equiripple linear phase lowpass filter with gain boost using nauta transcondutor', 2017 17th International Symposium on Communications and Information Technologies, ISCIT 2017, International Symposium on Communications and Information Technologies, IEEE, Cairns, QLD, Australia, pp. 1-4.View/Download from: UTS OPUS or Publisher's site
© 2017 IEEE. In this paper a leapfrog feedback filter architecture that uses only single-ended input and single-ended output (SISO) transconductors and grounded capacitors is described. The filter structure has all circuit nodes containing a grounded capacitor and requires only simple transconductors, thus suitable for higher frequency applications. To show the high frequency capability, a fifth-order linear phase UHF filter with gain boost has been designed using Nauta transconductor. This may be the first time that Nauta transcodunctors are used in HDD read channels.
Zhong, Y, Bautista, M, Liu, H & Zhu, JB 2017, 'Design of an oscillator in a 0.25 μm GaN-on-SiC HEMT technology for long range remote sensing applications', 2017 17th International Symposium on Communications and Information Technologies (ISCIT), International Symposium on Communications and Information Technologies, IEEE, Cairns, QLD, Australia.View/Download from: UTS OPUS or Publisher's site
The radar systems have been widely deployed in our daily life, from non-invasive vital sign detection to hand gesture recognition. Among these systems, there is no doubt that oscillator plays the most critical role. In this paper, design of an oscillator to achieve both high output power and low phase noise is investigated at the circuit level. A prototype oscillator is implemented in a 0.25-μm GaN-on-SiC HEMT technology. Based on the measured results, the phase noise of the designed oscillator can be achieved as low as -112 dBc/Hz and -143 dBc/Hz at 100 kHz offset and 1 MHz offset respectively from a 4.954 GHz carrier, with an output power of more than 14 dBm. Moreover, the output power can be enhanced up to 26 dBm, if a drain bias 16 V is used, while good phase noise of -132 dBc/Hz @ 1 MHz is still achievable. This work has successfully demonstrated that the oscillator designed in GaN-on-SiC HEMT technology might be very well suitable for long range remote sensing applications.
Bautista, M, Dutkiewicz, E, Huang, X, Nguyen, D & Zhu, F 2016, 'Quadrature Broadband Phase Shift Generation Using Passive RC Polyphase Filter for RF Front-end', Proceedings of the 2016 16th International Symposium on Communications and Information Technologies (ISCIT), International Symposium on Communications and Information Technologies, IEEE, Qingdao, China, pp. 597-601.View/Download from: UTS OPUS or Publisher's site
This paper reviews the state of the art of a polyphase complex filter for RF front-end low-IF transceivers applications. We then propose a multi-stage polyphase filter design to generate a quadrature I/Q signal to achieve a wideband precision quadrature phase shift with a constant 90 ° phase difference for self-interference cancellation circuit for full duplex radio. The number of the stages determines the bandwidth requirement of the channel. An increase of 87% in bandwidth is attained when our design is implemented in multi-stage from 2 to an extended 6 stages. A 4-stage polyphase filter achieves 2.3 GHz bandwidth.
Bautista, MG, Jilluh, QI, Heimlich, M, Dutkiewicz, E & Pasco, J 2015, 'Design of low power, high PSRR low drop-out voltage regulator', 8th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management, HNICEM 2015, International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management, HNICEM, IEEE, Cebu City, Philippines.View/Download from: Publisher's site
© 2015 IEEE.This paper presents a low power, low drop-out (LDO) voltage regulator, designed and implemented using 0.18 micron CMOS process. With a supply voltage of 1.8V, 50mA current and with a single compensation capacitor of 1pF. A constant transconductance current reference is used as a bias circuit for the Error Amplifier. The maximum output load current is 50mA at a regulated output voltage of 1.68V.The voltage regulator delivers a full load transient response of 5.5mV overshoot and 3.4mV undershoot. Furthermore, the LDO PSRR rating is -73dB @ 16.7MHz, and a relatively low power of 90mW.
Bautista, MGV, Liou, WR & Yeh, ML 2013, 'Dimmable multi-channel RGB LED driver', 2013 IEEE ECCE Asia Downunder - 5th IEEE Annual International Energy Conversion Congress and Exhibition, IEEE ECCE Asia 2013, pp. 1259-1262.View/Download from: Publisher's site
This paper proposes a dimmable multi-channel Red-Green-Blue (RGB) LED Driver for backlighting and display and applies variable control technique to regulate color mixing. A linear Control DC-DC converter is used to provide the needed constant current for the RGB LEDs. It is designed to provide greater than 25mA constant output current with high accuracy. A PWM control method is used, of which the variable external voltage determines the available brightness levels and has a dimming frequency of 2 kHz. The proposed LED driver system is also able to dim each individual LED color through the dimming controller circuit; for each of the 3 channel per color around 90%, 93% 93% efficiencies for the red, green and blue channels respectively. A digital port was provided for the option of Digital dimming using a microcontroller. A linear current regulator is presented and this can be extended and applied to multiple strings. The temperature coefficient for the red channel is 75.43 ppm/°C and 89.46 ppm/°C for both green and blue channel. This was designed and simulated using 0.35micron TSMC 2P4M 5V technology and the chip area is 2.31×1.48 (mm2). © 2013 IEEE.